Giovanni De Micheli is Professor and Director of the Institute of Electrical Engineering and of the Integrated Systems Centre at École Polytechnique Fédérale de Lausanne (EPFL), Switzerland. He is program leader of the Nano-Tera.ch program. Previously, he was Professor of Electrical Engineering at Stanford University. He holds a Nuclear Engineer degree (Politecnico di Milano, 1979), a M.S. and a Ph.D. degree in Electrical Engineering and Computer Science (University of California, Berkeley, 1980 and 1983) under Alberto Sangiovanni-Vincentelli.
De Micheli is a Fellow of ACM and IEEE and a member of the Academia Europaea. He is also appointed as an AAAS Fellow. In 2016, he was also awarded the Harry H. Goode Memorial Award for his seminal contributions to design and design tools for networks on chips. His research interests include several aspects of design technologies for integrated circuits and systems, such as synthesis for emerging technologies, networks on chips and 3D integration. He is also interested in heterogeneous platform design including electrical components and biosensors, as well as in data processing of biomedical information. He is author of Synthesis and Optimization of Digital Circuits (McGraw-Hill, 1994) and co-author and/or co-editor of several other books.
Honors and awards
Prof. De Micheli is the recipient of the 2023 Phil Kaufman award for distinguished contributions to ESD, 2012 IEEE/CAS Mac Van Valkenburg award for contributions to theory, practice and experimentation in design methods and tools and of the 2003 IEEE Emanuel R. Piore Award for contributions to computer-aided synthesis of digital systems.
He has chaired several conferences, including DATE (2010), pHealth (2006), VLSI SOC (2006), DAC (2000) and ICCD (1989).
His PhD students include Luca Benini and Rajesh K. Gupta.
Selected publications
Benini, Luca, and Giovanni De Micheli. "Networks on chips: A new SoC paradigm." computer 35.1 (2002): 70–78. De Micheli, Giovanni. Synthesis and optimization of digital circuits. No. BOOK. McGraw Hill, 1994. Benini, Luca, and Giovanni DeMicheli. Dynamic power management: design techniques and CAD tools. Springer Science & Business Media, 1997. Murali, Srinivasan, and Giovanni De Micheli. "Bandwidth-constrained mapping of cores onto NoC architectures." Proceedings design, automation and test in Europe conference and exhibition. Vol. 2. IEEE, 2004. Bertozzi, Davide, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, and Giovanni De Micheli. "NoC synthesis flow for customized domain specific multiprocessor systems-on-chip." IEEE transactions on parallel and distributed systems 16, no. 2 (2005): 113–129. Benini, Luca, and Giovanni de Micheli. "System-level power optimization: techniques and tools." ACM Transactions on Design Automation of Electronic Systems (TODAES) 5.2 (2000): 115–192.
References
External links
http://si2.epfl.ch/~demichel/
http://www.epfl.ch/
http://si.epfl.ch/
http://www.nano-tera.ch/
Google Scholar Profile
Polytechnic University of Milan alumni
Living people
Stanford University School of Engineering faculty
UC Berkeley College of Engineering alumni
Academic staff of the École Polytechnique Fédérale de Lausanne
Members of Academia Europaea
Year of birth missing (living people)