A resistor ladder is an electrical circuit made from repeating units of resistors, in specific configurations.
An R–2R ladder configuration is a simple and inexpensive way to perform digital-to-analog conversion (DAC), using repetitive arrangements of precise resistor networks in a ladder-like configuration. A string resistor ladder configuration implements the non-repetitive reference network.
History
A 1953 paper "Coding by Feedback Methods" describes "decoding networks" that convert numbers (in any base) represented by voltage sources or current sources connected to resistor networks in a "shunt resistor decoding network" (which in base 2 corresponds to the binary-weighted configuration) or in a "ladder resistor decoding network" (which in base 2 corresponds to R–2R configuration) into a single voltage output. The paper gives an advantage of R–2R that impedances seen by the sources are more equal.
Another historic description is in US Patent 3108266, filed in 1955, "Signal Conversion Apparatus".
String resistor ladder network
A string of many resistors connected between two reference voltages is called a "resistor string". The resistors act as voltage dividers between the referenced voltages. A Kelvin divider or string DAC is a string of equal valued resistors.
Analog-to-digital conversion
Each tap of the string generates a different voltage, which can be compared with another voltage: this is the basic principle of a flash ADC (analog-to-digital converter). Often a voltage is converted to a current, enabling the possibility to use an R–2R ladder network.
Disadvantage: for an n-bit ADC, the number of resistors grows exponentially, as resistors are required, while the R–2R resistor ladder only increases linearly with the number of bits, as it needs only resistors. Advantage: higher impedance values can be reached using the same number of components.
Digital-to-analog conversion
A string resistor can function as a DAC by having the bits of the binary number control electronic switches connected to each tap.
Binary weighted
The binary weighted configuration uses power of two multiples of a base resistor value. However as the ratios of resistor values increases, the ability to trim the resistors to accurate ratio tolerances becomes diminished. More accurate ratios can be obtained by using similar values, as is used in R–2R ladder. Hence R–2R provides more accurate digital-to-analog conversion.
R–2R resistor ladder network (digital to analog conversion)
Voltage Mode
A voltage mode R–2R resistor ladder network is shown in Figure 1. Bit an−1 (most significant bit, MSB) through bit a0 (least significant bit, LSB) are driven from digital logic gates. Ideally, the bit inputs are switched between V = 0 (logic 0) and V = Vref (logic 1). The R–2R network causes these digital bits to be weighted in their contribution to the output voltage Vout. Depending on which bits are set to 1 and which to 0, the output voltage (Vout) will have a corresponding stepped value between 0 and Vref minus the value of the minimal step, corresponding to bit 0. The actual value of Vref (and the voltage of logic 0) will depend on the type of technology used to generate the digital signals.
For a digital value VAL, of a R–2R DAC with N bits and 0 V/Vref logic levels, the output voltage Vout is:
For example, if N = 5 (hence 2N = 32) and Vref = 3.3 V (typical CMOS logic 1 voltage), then Vout will vary between 0 volts (VAL = 0 = 000002) and the maximum (VAL = 31 = 111112):
with steps (corresponding to VAL = 1 = 000012)
The R–2R ladder is inexpensive and relatively easy to manufacture, since only two resistor values are required (or even one, if R is made by placing a pair of 2R in parallel, or if 2R is made by placing a pair of R in series). It is fast and has fixed output impedance R. The R–2R ladder operates as a string of current dividers, whose output accuracy is solely dependent on how well each resistor is matched to the others. Small inaccuracies in the MSB resistors can entirely overwhelm the contribution of the LSB resistors. This may result in non-monotonic behavior at major crossings, such as from 011112 to 100002.